This invention relates to a video camera, and more particularly may be applied to camera incorporated video tape recorder.
In the conventional television camera, there has been proposed an image shift correction technique in which image shift is corrected by shifting an image by an amount of the image shift made.
More specifically, a television camera 1, as shown in FIG. 1, picks up an image of an object by means of CCD (charge coupled device) solid state pick-up device 2, for example.
The solid state pick-up device 2 includes an image pick-up unit 6 which has light receiving elements arranged in a unit of a pixel for horizontal and vertical scanning, and according to a reference signal from a reference signal generating circuit 4 the pick-up unit 6 sequentially outputs charges accumulated in each light receiving element to a camera process circuit 10 through a resistor circuit 8.
As shown in FIG. 2, in the pick-up unit 6, electric charges are sequentially outputted from light receiving elements I.sub.n, I.sub.n+1, . . . through adder circuits E.sub.n+1, E.sub.n+2, . . . for even fields and through adder circuits O.sub.n, O.sub.n+1 . . . for odd fields, and picked-up image signals S.sub.n which are generated by consecutively arranging output signals of the light receiving elements in the order of interlace.
The camera process circuit 10 converts the picked-up image signals S.sub.n to luminance signals S.sub.Y and chrominance signals S.sub.R-Y, S.sub.B-Y and outputs them to an image shift correction circuit 12.
Here, in the image shift correction circuit 12 luminance signals S.sub.Y are received in motion detection circuit 14, which detects a direction and magnitude of the image shift by detecting a corresponding motion vector, using frame correlation.
According to the motion vector, a control circuit 16 reads out the luminance signal S.sub.Y, and chrominance signals S.sub.R-Y, S.sub.B-Y temporarily stored in a video memory circuit 18 to thereby making a parallel displacement of the picked-up image by the amount of the image shift.
For example, as shown in FIG. 3, the luminance signals S.sub.Y and the chrominance signals S.sub.R-Y, S.sub.B-Y of lines y.sub.n, y.sub.n+256, y.sub.n+1, y.sub.n+257, . . . are read out at timing of lines y.sub.n+1, y.sub.n+257, y.sub.n+2, y.sub.n+258, . . . , respectively, and in this case, an image of the luminance signals S.sub.Y and the chrominance signals S.sub.R-Y, S.sub.B-Y is displaced by two lines in parallel.
In this manner, the control circuit 16 makes a correction of the image shift in a unit of a pixel for the horizontal direction and in a unit of two lines for the vertical direction.
Furthermore, the control circuit 16 makes a correction of the image shift at a finer accuracy in a vertical interpolation circuit 20 and a horizontal interpolation circuit 22.
More specifically, in the vertical interpolation circuit 20, output signals of the video memory circuit 18 are amplified in an amplification circuit 24, and are then provided to an adder circuit 26.
Moreover, in the vertical interpolation circuit 20 output signals of the video memory circuit 18 are provided to an amplification circuit 30 though a delay circuit 28 of which delay time is set to one horizontal scanning period, and output signals of the amplification circuit 30 are outputted to the adder circuit 26.
In such a manner, gains of the amplification circuits 24 and 30 are controlled by the control circuit 16, and thereby video signals outputted from the video memory circuit 18 are interpolated, so that image shift not larger than two lines is corrected in the vertical direction.
In a case where an image shift of one line is to be corrected, as shown in FIG. 4, gains of the amplification circuits 24 and 30 are set to 1/2 thereof, and sum signals (y.sub.n +y.sub.n+1)/2, (y.sub.n+1 +y.sub.n+2)/2, . . . of adjacent lines y.sub.n and y.sub.n+1, y.sub.n+1 and y.sub.n+2, . . . are outputted for respective fields.
Similarly, in the horizontal interpolation circuit 22, image shift smaller than intervals of pixels is corrected by the use of a delay circuit with a delay time of one clock cycle in place of the delay circuit 28.
In this manner, the image shift correction circuit 12 makes a parallel translation of the picked-up image by the amount of the image shift, so that the image shift can be corrected.
In a case where in an image G an object N of which picture has been taken at the center of the image is, as shown in FIGS. 5A-5C, moved to an upper right corner by an image shift (FIG. 5A), the image shift can be corrected by parallel translation of the whole image as indicated by the arrow (FIG. 5B).
In this case, the frame of the corner is however arranged within an angle of view as hatched, and this produces a disadvantage in that the displaced picture becomes degraded in appearance.
For this reason, the control circuit 12 controls timing of reading of the video memory circuit 18 and gains of the amplification circuits 24 and 30 to change an amount of parallel displacement according to the position of each image G so that the image G is enlarged not to display the corner of the frame (FIG. 5C).
More specifically, at a central portion of the image G, the parallel displacement is performed by the amount of the motion vector whereas in the peripheral portion of the image G, the parallel displacement which is obtained from the motion vector is corrected so as to enlarge the image as approaches to the peripheries. In this manner, the image shift is corrected.
Thus, the image shift can be corrected through the image shift correction circuit 12, and the corrected luminance signals and chrominance signals are outputted to a video signal synthesis circuit 32, so that video signals of which image shift has been corrected can be obtained.
In a case where image shift is corrected by the use of such a technique of vertical interpolation operation, it is an inevitable problem that deterioration in vertical resolution cannot be avoided.
Moreover, there is another problem in that vertical relationship of lines between even and odd fields is reversed by outputting sum signals (y.sub.n +y.sub.n+1)/2, (y.sub.n+1 +y.sub.n+2)/2, . . . of adjacent lines y.sub.n and y.sub.n+1, y.sub.n+1 and y.sub.n+2, . . . for each field in the horizontal interpolation circuit 22, and an inclined line, for example, is displaced in the shape of notches, which makes the displayed image ugly.
To solve this problem, a technique to correct an image shift in a unit of a frame is considered as one way, but this technique is liable to display motion pictures in duplicate.